Overview
Best-in-class CXL Verification IP for your IP, SoC, and system-level design testing.
The Cadence Verification IP (VIP) for Compute Express Link (CXL) is part of the Cadence family of VIP for PCI Express® (PCIe®). Built on top of Cadence's mature industry-leading VIP for PCIe, the CXL VIP provides a complete bus functional model for all three CXL protocols, CXL.io/CXL.mem/CXL.cache, and allows users to verify both CXL host, device and Switch designs for all device types (Type 1, 2, 3) from the very first days of the CXL protocol.
Product Highlights
Key Features
The following table describes key features from the specifications that are implemented in the VIP.
Feature Name |
Description |
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Device Configuration |
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Spec Version |
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Device Type |
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Protocol Support |
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Simulation Test Suite
Extensive testsuite, coverage model, and verification plan with clear linkage to the specification for simple and fast compliance testing.
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Cadence Online Support
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