Overview
Best-in-class Arm® AMBA® APB Verification IP (VIP) for your IP, SoC, and system-level design testing.
Cadence provides a mature and comprehensive Verification IP (VIP) for the Advanced Peripheral Bus (APB) specification, which is part of the Arm® AMBA® family of protocols. Incorporating the latest protocol updates, the Cadence® Verification IP for APB provides a complete bus functional model (BFM), integrated automatic protocol checks, and coverage model. Designed for easy integration in testbenches at IP, system-on-chip (SoC), and system levels, the VIP for APB helps you reduce time to test, accelerate verification closure, and ensure end-product quality. Cadence provides a solution for interconnect verification that verifies the correctness and completeness of data. The VIP is compatible with the industry-standard Universal Verification Methodology (UVM) and runs on all leading simulators.
Supported specifications: AMBA 2 APB, AMBA 3 APB, AMBA 4 APB, AMBA 5 APB issue D and E.
Product Highlights
Key Features
The following table describes key features from the specifications that are implemented in the VIP:
Feature Name |
Description |
---|---|
Data and Address Widths |
|
Automatic Completer Responses |
|
Delay Control |
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Multiple Agents |
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仿真测试集合
VIP 附带一个场景测试集合,可轻松评估和部署 VIP
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