High-Performance Spectre Simulation Training
日期 | 版本 | 国家/地区 | 位置 | |
---|---|---|---|---|
Scheduled upon demandOn demand | EXPRESS INTERESTINQUIRE |
版本 | 区域 | |
---|---|---|
SPECTRE23.1 | Online | ENROLL |
SPECTRE20.1 | Online | ENROLL |
Other Versions | Online | EXPRESS INTERESTINQUIRE |
Length: 1 Day (8 hours)
Digital Badges
Course Description
In this course, you use the Cadence® Spectre® Accelerated Parallel Simulator (APS), which is a part of the Virtuoso® Multi-Mode Simulation, to perform advanced SPICE-accurate simulation for faster convergence on design goals while offering scalable performance and capacity over the baseline Spectre Classic Simulator. You examine how the proprietary full-matrix solving technology in the Spectre APS delivers unparalleled scalability and multithreading capability using modern multi-core computing platforms. You explore the simulation technology and features of Spectre MS for mixed-signal designs.
You learn how to perform post-layout simulation with Spectre APS. You identify the stitching of parasitics and the inclusion of parasitic files for post-layout simulation. Finally, you enable post-layout optimization (+postlayout) to perform parasitic reduction using Spectre APS.
You also explore the key features of the Spectre X Simulator and use the preset modes to run high-performance simulations. Using the Spectre X Simulation mode, you enable parasitic optimization (+postlpreset) for post-layout designs.
Learning Objectives
After completing this course, you will be able to:
- Use the Spectre Accelerated Parallel Simulator (APS) modes (+aps) and (++aps) to run high performance simulations
- Debug performance or convergence-related simulation issues using the Spectre Diagnose Mode (+diagnose)
- Use the Spectre MS Simulator (MS Options) to deliver a high-performance transistor-level multi-rate simulation solution by combining a highly accurate SPICE engine with a fast digital simulation technology
- Enable post-layout optimization (+post layout) to perform parasitic reduction
- Run a post-layout simulation using dspf_include and stitching methodologies
- Identify the key features of the Spectre X Simulator
- Use the Spectre X preset modes (+preset) to run the high-performance simulation
- Examine Spectre X single-process and multi-process simulations
- Enable parasitic optimization (+postlpreset) for post-layout designs
Software Used in This Course
- Spectre Classic Simulator
- Spectre Accelerated Parallel Simulator (APS)
- Spectre Extensive Partitioned Simulator
- Spectre X Simulator
- Spectre Multimode Simulation
- Spectre Power Option
- Cadence Design Framework II
- Virtuoso Schematic Editor
- Virtuoso Layout Suite
- Virtuoso ADE Explorer
- Virtuoso Visualization and Analysis
Software Release(s)
SPECTRE23.1, IC23.1
Modules in this Course
- Spectre APS Technology
- Post-Layout Simulation with Spectre APS
- Spectre X Technology
Audience
- IC Designers
- RF Designers
- Electrical Engineers
- Design Engineers
- Chip Designers
- Analog and Mixed-Signal Designers
Prerequisites
You must have:
- The ability to create schematics and run simulations with Cadence tools
- A working knowledge of simulation techniques with different netlist formats
Or you must have completed the following courses:
Related Courses
- Spectre Simulator Fundamentals S1: Spectre Basics
- Spectre Simulator Fundamentals S2: Large-Signal Analyses
Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.
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