Tensilica Xtensa LX Hardware Verification and EDA Training
版本 | 区域 | |
---|---|---|
7.4 | Online | ENROLL |
Other Versions | Online | EXPRESS INTERESTINQUIRE |
Length: 1/2 day (4 Hours)
Course Description
This on-line course provides information about Tensilica® processor technology and how to use Tensilica product deliverables for your SoC design. You explore topics regarding installation of the Xtensa® processor and hardware package. You will understand the verification environment provided with the Xtensa processor. This will allow you to modify the testbench and extend the testing of your complete SoC.
You will also understand the implementation flow of the Xtensa processor. This includes configuring and running the EDA scripts provided for:
- Synthesis
- Place and Route
- Power Analysis
- Formal Verification
The solid fundamentals taught in this course enable you to quickly become productive in the use of Xtensa processors for your SoC design.
Learning Objectives
After completing this course, you will be able to:
- Identify practical information about Tensilica’s hardware package
- Understand Tensilica’s provided synthesis and verification work flows
- Be aware of common questions and pitfalls
Software Used in This Course
- Xtensa Software Tools Release RG-2017.7
Software Release(s)
RG-2017.7
Modules in this Course
- Delivering and Installing your Xtensa Processor
- Xtensa Hardware Verification
- Synthesis, Place & Route and other EDA Scripts and Work Flows
- Next Steps
Audience
- SoC architects designing systems with Xtensa processors
- Architects/Designers configuring Xtensa processors for a specific application
- Design verification engineers
- Back-end flow hardware engineers
Prerequisites
You must have experience with or knowledge of the following:
- Basic microprocessor architecture
- RTL design for hardware engineers
Or you must have completed the following courses:
Related Courses
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