Quantus 提取解决方案与 Innovus 实现系统(用于数字设计)和 Virtuoso Studio (用于定制/模拟设计)紧密集成。Quantus还提供 Quantus Field Solver，这是一种云就绪的提取工具，提供无与伦比的精度。
更快的设计收敛
更快的单角和多角运行时间
增强的精度
智能寄生参数提取，为数字和定制/模拟设计提供超准确的 RC 数据
提高生产力
与 Innovus Implementation System 和 Virtuoso Studio 紧密集成，加快设计收敛
易于使用
直观的用户界面，更强大的交互式调试和洞察可视化功能，方便用户在 Virtuoso Studio 轻松查看定制/模拟设计
After validating the runtimes of Cadence’s Quantus QRC Extraction Solution on benchmark designs, we have determined that it offers significant improvements without compromising signoff accuracy.
Sumbal Rafiq, Director of Engineering, AppliedMicro
Despite increasing SoC design sizes and interconnect process corners at advanced nodes, Open-Silicon has achieved design closure quickly by using the Quantus QRC Extraction Solution along with its best-in-class design methodologies and tools.
Radhakrishnan Pasirajan, Vice President of Silicon Engineering, Open-Silicon
Using these [Quantus, Tempus, and Tempus ECO] signoff engines, which are consistent with the Cadence Innovus Implementation System for both extraction and static timing analysis, ensured tight correlation and a reduction in design iterations during signoff for quick design convergence.
Dr. Paolo Miliozzi, VP of SoC Technology, MaxLinear
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