Overview
Best-in-class SAS Verification IP for your IP, SoC, and system-level design testing.
The Cadence® Verification IP (VIP) for SAS is part of Cadence’s broad storage interface verification IP (VIP) portfolio. Serial Attached SCSI (SAS) has been the interface of choice for mission-critical enterprise storage subsystems, with the next-generation SAS 24G addressing the transmission and storage of data growing at an exponential rate due to an increasingly connected world. As a part of Cadence’s datacenter and cloud solution, the VIP for SAS delivers a comprehensive solution that was delivered ahead of the 2017 SAS plug-festival. Built on top of an industry-known and proven platform that was designed for easy integration in testbenches at the IP, system-on-chip (SoC), and system level, the SAS VIP runs on all simulators and supports SystemVerilog along with the widely adopted Universal Verification Methodology (UVM). This enables verification teams to reduce time spent on environment development, and redirect the saved time to cover a larger verification space, accelerate verification closure, and ensure end-product quality.
Product Highlights
Key Features
The following table describes key features from the specifications that are implemented in the VIP:
Feature Name |
Description |
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Device type |
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Operating Modes |
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Interface Support |
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Transport Layer Protocols |
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Simulation Test Suite
Extensive testsuite, coverage model, and verification plan with clear linkage to the specification for simple and fast compliance testing.
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Cadence Online Support
Increase your efficiency in using Cadence Verification IP with online trainings, VIP Portal, application notes, and troubleshooting articles