Overview
Gold standard for JEDEC® LPDDR4 memory device for your IP, SoC, and system-level design verification.
In production since 2015 on dozens of production designs.
This Cadence® Verification IP (VIP) supports the JEDEC® Low Power Memory Device, LPDDR4 standard. It provides a mature, highly capable compliance verification solution that supports simulation, formal analysis, and hardware acceleration platforms, making it applicable to intellectual property (IP), system-on-chip (SoC), and system-level verification. The LPDDR4 VIP is compatible with the industry-standard Universal Verification Methodology (UVM), runs on all leading simulators, and leverages the industry-standard Cadence Memory Model core architecture, interface, and use model.
Product Highlights
Key Features
The following table describes key features from the specifications that are implemented in the VIP:
Feature Name |
Description |
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Speed (Mt/s) |
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Device Density |
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Dual Channels |
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General DDR Functionality and Timing Checks |
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