Success Story
SiFive Tapeout 7nm/12nm/14nm Products Using Cadence Tempus ECO and Signoff
We trust the Cadence Tempus Timing Signoff Solution as our timing tool of choice for all of our SoCs across applications on satellite systems, aerospace control systems, SSD controllers, satellite beamforming, USB products, AI products, RISC-V, and machine learning SoCs. Its performance, coupled with integration within the Cadence Innovus Implementation System, has allowed us to significantly reduce the time we spend in timing closure and achieve better PPA. The size and complexity of our designs, some in the range of ~130M instances, require timing ECOs to be handled efficiently and the Tempus solution was the right timing platform to address our needs. Furthermore, by using the Tempus solution for signoff, we are able to converge and achieve faster design closure time.
Parthasarathy Narasimhan, Sr. Director, Asic Design Engineering
Overview