Resource Library
- MaxLinear Bridges the Gap Between Firmware and Hardware Development with Cadence
- GSP Emulation with Palladium Platform and Prototyping with Protium Platform
- SoC Firmware Debugging Tracer in Emulation Platform
- Improving Firmware Validation Productivity and Debug Efficiency Using Palladium Z1 Platform and Indago Debug Analyzer
- 400G以太在Palladium加速器上的仿真加速实践
- 400G以太在Palladium加速器上的仿真加速实践
- Pushbutton migration from emulation to prototyping based on Protium platform
- Accelerating software bring up and debug on emulator with a fluent migration from Palladium to Protium
- Accelerate Baidu Kunlun AI chip development based on Palladium Z1 platform
- DFT DFD verification acceleration on Palladium
- Conquer IP Functional Verification with Formal and Simulation Approach
- イマジネーション、ケイデンスのデジタル設計・検証ソリューションを使用し、最先端GPUテクノロジを提供
- Palladium Z1助力晶片設計與驗證 - 加速智慧影像與微處理器設計
- Accelerating software bring up and debug on emulator with a fluent migration from Palladium to Protium
- Digital Twin Case Study: Applying Emulation-Based Verification of SoC Using Tactical Software
- DFT DFD verification acceleration on Palladium
- Marvell Gains High Confidence for Silicon Tapeout Using Palladium Emulator to Validate Processor
- Building better aerospace and defense electronics: emulate before you fabricate
- Accelerate Your Time to Debug Root Cause
- Spirent Is Bringing Chipset Testing to Pre-Silicon Verification with Palladium and Protium Platforms
- AMD Designs 3rd-Gen EPYC Server Processors for HPC with Dynamic Duo
- Create Palladium Design Equivalent to Both Specification and Gate Implementation on Silicon
- Palladium and Protium Dynamic Duo
- Verify Smarter with Industry's First Datacenter-Class Emulation System
- Cadence Collaboration with Arm Enables Customers to Successfully Tape out Next-Generation Arm Mobile Designs
- Cadence 與Arm攜手合作,加速超大規模運算與5G通訊SoC的開發
- Nuvoton Accelerates the Development of its MCU Designs with the Cadence Palladium Z1 Enterprise Emulation Platform
- Cadence to Optimize Digital Full Flow and Verification Suite for Arm Cortex-A78 and Cortex-X1 CPU Mobile Device Development
- Acacia Communications Adopts Cadence Palladium Z1 Enterprise Emulation Platform to Accelerate Optical Networking Development
- SoC Firmware Debugging Tracer in Emulation Platform
- 400G以太在Palladium加速器上的仿真加速实践
- 400G以太在Palladium加速器上的仿真加速实践
- Pushbutton migration from emulation to prototyping based on Protium platform
- Accelerate Baidu Kunlun AI chip development based on Palladium Z1 platform
- Conquer IP Functional Verification with Formal and Simulation Approach
- Digital Twin Case Study: Applying Emulation-Based Verification of SoC Using Tactical Software
Videos
Customers
Training and Support
Need Help?
Training
The Training Learning Maps help you get a comprehensive visual overview of learning opportunities.
Training News - Subscribe
Online Support
The Cadence Online Support (COS) system fields our entire library of accessible materials for self-study and step-by-step instruction.
Request SupportTechnical Forums
Find community on the technical forums to discuss and elaborate on your design ideas.
Find Answers in cadence technical forums